Search for: All records

Improving the photon-magnon coupling strength can be done by tuning the structure of microwave resonators to better interact with the magnon counterpart. Planar resonators accommodating unconventional photon modes beyond the half- and quarter-wavelength designs have been explored due to their optimized mode profiles and potentials for on-chip integration. Here, we designed and fabricated an actively controlled ring resonator supporting the spoof localized surface plasmons (LSPs), and implemented it in the investigation of photon-magnon coupling for hybrid magnonic applications. We demonstrated gain-assisted photon-magnon coupling with the YIG magnon mode under several different sample geometries. The achieved coupling amplification largely benefits from the high quality factor (Q-factor) due to the additional gain provided by a semiconductor amplifier, which effectively increases the Q-factor from a nearly null state (passive resonance) to more than 1000 for a quadrupole LSP mode. Our results suggest an additional control knob for manipulating photon-magnon coupled systems exploiting external controls of gain and loss. 

Abstract Geometric diodes (GDs) represent a relatively unconventional class of diode that produces an asymmetric current response through carrier transport in an asymmetric geometry. Synthesized from the bottom up, Si nanowire‐based GDs are three‐dimensional, cylindrically symmetric nanoscale versions capable of room‐temperature rectification at GHz‐THz frequencies with near zero‐bias turn‐on voltages. Here, by fabricating three‐terminal n‐type Si nanowire GDs with axial contacts and an omega‐gate electrode, a distinct class of reconfigurable self‐switching geometric diodes (SSGDs) is reported. Single‐nanowire SSGD device measurements demonstrate a significant dependence of diode current and polarity on gate potential, where the diode polarity reverses at a gate potential of ≈−1 V under specific grounding conditions. Finite‐element modeling reproduces the experimental results and reveals that the gate potential—in combination with the morphology and dopant profile—produces an asymmetric potential along the nanowire axis that changes asymmetrically with axial bias, altering the effective conductive channel within the nanowire to yield diode behavior. The self‐switching effect is retained in two‐terminal SSGD devices, and modeling demonstrates that both three‐terminal and two‐terminal devices support rectification through THz frequencies. The results reveal a new mechanism of operation for nanowire‐based GDs and characterize a new type of self‐switching diode with reconfigurable polarity. 

Abstract In this work, bottom‐up Al–Si–Al nanowire (NW) heterostructures are presented, which act as a prototype vehicle toward top‐down fabricated nanosheet (NS) and multi‐wire (MW) reconfigurable field‐effect transistors (RFETs). Evaluating the key parameters of these transistors regarding the on‐ and off‐currents as well as threshold voltages for n‐ and p‐type operation exhibit a high degree of symmetry. Most notably also a low device‐to‐device variability is achieved. In this respect, the investigated Al–Si material system reveals its relevance for reconfigurable logic cells obtained from Si NSs. To show the versatility of the proposed devices, this work reports on a combinational wired‐AND gate obtained from a multi‐gate RFET. Additionally, up‐scaling the current is achieved by realizing a MW RFET without compromising reconfigurability. The Al–Si–Al platform has substantial potential to enable complex adaptive and self‐learning combinational and sequential circuits with energy efficient and small footprint computing paradigms as well as for native components for hardware security circuits. 

Abstract Metal‐semiconductor heterostructures providing geometrically reproducible and abrupt Schottky nanojunctions are highly anticipated for the realization of emerging electronic technologies. This specifically holds for reconfigurable field‐effect transistors, capable of dynamically altering the operation mode between n‐ or p‐type even during run‐time. Targeting the enhancement of fabrication reproducibility and electrical balancing between operation modes, here a nanoscale Al‐Si‐Al nanowire heterostructure with single elementary, monocrystalline Al leads and sharp Schottky junctions is implemented. Utilizing a three top‐gate architecture, reconfiguration on transistor level is enabled. Having devised symmetric on‐currents as well as threshold voltages for n‐ and p‐type operation as a necessary requirement to exploit complementary reconfigurable circuits, selected implementations of logic gates such as inverters and combinational wired‐AND gates are reported. In this respect, exploiting the advantages of the proposed multi‐gate transistor architecture and offering additional logical inputs, the device functionality can be expanded by transforming a single transistor into a logic gate. Importantly, the demonstrated Al‐Si material system and thereof shown logic gates show high compatibility with state‐of‐the‐art complementary metal‐oxide semiconductor technology. Additionally, exploiting reconfiguration at the device level, this platform may pave the way for future adaptive computing systems with low‐power consumption and reduced footprint, enabling novel circuit paradigms.